Connectivity Graphs and Constraints: Modeling Hardware Limitations in Quantum Circuits

Table of Contents

1. Introduction
2. What Is a Connectivity Graph?
3. Why Connectivity Constraints Matter
4. Qubit Coupling in Real Quantum Hardware
5. Representing Hardware with Graphs
6. Types of Hardware Topologies
7. IBM’s Grid and Coupling Map
8. Rigetti’s Lattice Structure
9. IonQ’s Fully Connected Model
10. Using NetworkX to Visualize Connectivity
11. Mapping Circuits to Connectivity Graphs
12. Effects of Constraints on Circuit Depth
13. Role of SWAP Gates in Overcoming Constraints
14. Logical vs Physical Qubit Mapping
15. Connectivity-Aware Transpilation
16. Measuring Connectivity Overhead
17. Coupling-Aware Gate Scheduling
18. Real Hardware Examples and Benchmarking
19. Tools and Libraries Supporting Connectivity Modeling
20. Conclusion

1. Introduction

Connectivity graphs describe how qubits on a quantum device can interact. Understanding and modeling these constraints is critical for building realistic and efficient quantum programs.

2. What Is a Connectivity Graph?

A graph \( G = (V, E) \), where:

• \( V \): qubits
• \( E \): allowed two-qubit interactions

3. Why Connectivity Constraints Matter

• Not all qubits can interact directly
• Two-qubit gate locations must respect the coupling graph
• SWAPs may be needed for non-adjacent qubits

4. Qubit Coupling in Real Quantum Hardware

Devices differ in qubit topology:

• IBM: grid topology
• Rigetti: lattice
• IonQ: full connectivity

5. Representing Hardware with Graphs

Edges define which qubits are connected:

coupling_map = [(0,1), (1,2), (2,3)]

6. Types of Hardware Topologies

• Line (linear chain)
• Ring
• 2D Grid
• Tree
• All-to-All

7. IBM’s Grid and Coupling Map

IBM uses rectangular grids:

backend.configuration().coupling_map

8. Rigetti’s Lattice Structure

Structured like a square lattice with nearest-neighbor couplings.

9. IonQ’s Fully Connected Model

Any qubit can interact with any other without SWAPs. Ideal for short circuits but slower gate times.

10. Using NetworkX to Visualize Connectivity

import networkx as nx
G = nx.Graph()
G.add_edges_from(coupling_map)
nx.draw(G, with_labels=True)

11. Mapping Circuits to Connectivity Graphs

Analyze if a 2-qubit gate exists between nodes:

• If not, insert SWAPs
• Respect physical qubit layout

12. Effects of Constraints on Circuit Depth

Non-local operations increase:

• Gate depth
• Total execution time
• Cumulative error

13. Role of SWAP Gates in Overcoming Constraints

SWAPs help move qubit states to adjacent physical locations, allowing non-local gates to execute.

14. Logical vs Physical Qubit Mapping

• Logical: from algorithm
• Physical: actual hardware qubit index
  Transpiler handles the mapping:

transpile(circuit, backend)

15. Connectivity-Aware Transpilation

Transpilers reorder and optimize gates for minimal constraint violations:

• Qiskit uses SABRE layout
• t|ket> uses routing and rebase passes

16. Measuring Connectivity Overhead

Compare:

• Initial vs final depth
• Number of SWAPs
• Logical vs physical layout distance

17. Coupling-Aware Gate Scheduling

Smart scheduling can reduce idle time and parallelize allowable gates.

18. Real Hardware Examples and Benchmarking

• IBM’s 127-qubit Eagle: 2D lattice
• Rigetti Aspen-M: triangular lattice
• IonQ: slower but fully connected

19. Tools and Libraries Supporting Connectivity Modeling

• Qiskit: coupling_map, transpiler visualization
• t|ket>: placement and routing
• NetworkX: topology modeling and layout

20. Conclusion

Connectivity graphs define the physical limitations of quantum devices and shape how quantum algorithms are compiled. Understanding these constraints allows developers to optimize performance and execute algorithms efficiently on current hardware.