Table of Contents

1. Introduction
2. What Is Quantum Circuit Mapping?
3. Why Mapping Matters for Real Devices
4. Qubit Connectivity Constraints
5. Coupling Maps and Hardware Topologies
6. Gate Fidelity and Error Awareness
7. Role of SWAP Gates in Mapping
8. Logical-to-Physical Qubit Assignment
9. Transpilation for Hardware Execution
10. Mapping Algorithms and Strategies
11. Lookahead and Heuristic Approaches
12. Gate Reordering and Merging
13. Cost Functions in Mapping
14. Mapping Tools in Qiskit
15. Mapping in t|ket> Compiler
16. Native Gate Sets and Instruction Sets
17. Real Hardware Examples (IBM, Rigetti, IonQ)
18. Performance Implications of Mapping
19. Visualizing Mapped Circuits
20. Conclusion

1. Introduction

Mapping is the process of converting an ideal quantum circuit into a form that can be run on a specific piece of quantum hardware, considering its physical constraints.

2. What Is Quantum Circuit Mapping?

It’s the transformation of a circuit’s abstract layout into an executable version with gate scheduling, connectivity, and instruction set adapted to the target hardware.

3. Why Mapping Matters for Real Devices

• Real qubits are limited in connectivity
• Gate fidelities vary by location
• SWAP operations introduce noise and delay

4. Qubit Connectivity Constraints

Most devices restrict 2-qubit operations to specific qubit pairs. For example, IBM Q uses coupling maps:

backend.configuration().coupling_map

5. Coupling Maps and Hardware Topologies

A coupling map defines which physical qubits can be entangled directly. Topologies include:

• Linear (IonQ)
• Grid (IBM)
• Full (simulators)

6. Gate Fidelity and Error Awareness

Each gate has an associated fidelity. Mapping can prioritize routes with lower error.

7. Role of SWAP Gates in Mapping

SWAP gates move logical qubit states across the physical architecture to satisfy connectivity.

8. Logical-to-Physical Qubit Assignment

Initial layout maps circuit qubits to physical hardware qubits:

transpile(circuit, backend, initial_layout=[0, 1, 2])

9. Transpilation for Hardware Execution

Qiskit uses a transpiler:

from qiskit import transpile
transpiled = transpile(circuit, backend, optimization_level=3)

10. Mapping Algorithms and Strategies

Common methods:

• SABRE (swap-based heuristic)
• Dense subgraph mapping
• Lookahead-based mapping

11. Lookahead and Heuristic Approaches

These balance gate commutativity and SWAP cost:

• Optimize future circuit segments
• Prioritize high-fidelity links

12. Gate Reordering and Merging

Reorder or fuse gates to reduce depth and SWAPs:

• CX + CX = I (cancellation)
• Merge single-qubit rotations

13. Cost Functions in Mapping

Metrics used to evaluate mapping:

• Depth
• Gate count
• Total SWAPs
• Estimated fidelity

14. Mapping Tools in Qiskit

Use pass managers and analysis tools:

from qiskit.transpiler import PassManager

15. Mapping in t|ket> Compiler

t|ket> provides advanced mapping passes:

• PlacementPass
• RoutingPass
• RebaseToNativeGates

16. Native Gate Sets and Instruction Sets

Each device has a native set of gates (e.g., U3, CX). Mapping must rebase to this set.

17. Real Hardware Examples (IBM, Rigetti, IonQ)

• IBM: 1D/2D grid with U/CX gates
• Rigetti: Aspen topology
• IonQ: all-to-all, but slow 2-qubit gates

18. Performance Implications of Mapping

Poor mapping = more SWAPs = more errors. Optimized mapping = shallower circuits = higher success rates.

19. Visualizing Mapped Circuits

Qiskit:

transpiled.draw('mpl')

Circuit depth and fidelity comparison pre/post mapping.

20. Conclusion

Mapping quantum circuits to hardware is a vital part of the compilation process. By optimizing qubit layout, reducing SWAPs, and targeting native gates, developers can ensure efficient and successful execution of quantum programs on real devices.

Table of Contents

1. Introduction
2. What Are Quantum Cost Metrics?
3. Importance of Cost Estimation in Quantum Computing
4. Common Quantum Cost Metrics
5. Gate Count and Depth
6. Qubit Count
7. T-count and Clifford Count
8. Circuit Width and Logical Depth
9. Fidelity and Error Rate Metrics
10. Crosstalk and Connectivity Constraints
11. Compilation and Transpilation Overhead
12. Resource Estimation for Fault-Tolerant Quantum Computing
13. Time-to-Solution (TTS)
14. Energy Usage and Cooling Costs (in Real Hardware)
15. Memory and Bandwidth Usage in Simulation
16. Metrics in Hybrid Quantum-Classical Workflows
17. Backend-Specific Cost Models (IBM, IonQ, Rigetti)
18. Tools for Cost Analysis (Qiskit, t|ket>, Q#)
19. Benchmarking and Optimization Strategies
20. Conclusion

1. Introduction

As quantum software and hardware mature, it’s essential to quantify how “costly” an algorithm is. Quantum cost metrics help developers and researchers understand resource needs and scalability of quantum algorithms.

2. What Are Quantum Cost Metrics?

These are quantitative measures of the resources required to implement, simulate, or execute a quantum algorithm. They guide choices in hardware selection, optimization, and benchmarking.

3. Importance of Cost Estimation in Quantum Computing

• Guides algorithm selection for target hardware
• Informs transpiler decisions
• Enables performance benchmarking
• Supports fault-tolerance estimation

4. Common Quantum Cost Metrics

• Gate count
• Circuit depth
• Number of qubits
• Error rate
• Fidelity

5. Gate Count and Depth

• Total number of quantum gates used
• Depth: number of sequential layers in the circuit

qc.count_ops()
qc.depth()

6. Qubit Count

• Total qubits used in the circuit
• Determines hardware compatibility

7. T-count and Clifford Count

• T-count: number of T-gates (resource-heavy in fault-tolerant models)
• Clifford count: CNOT, H, S gates
• T-depth: sequential T-gate layers

8. Circuit Width and Logical Depth

• Width: total logical qubits
• Depth: max number of dependent operations

9. Fidelity and Error Rate Metrics

• Gate fidelity: 1 – error probability
• Readout error
• Cross-talk induced decoherence

10. Crosstalk and Connectivity Constraints

• Certain architectures limit allowed gate pairs (e.g., IBM’s coupling maps)
• Increases swap gate usage and circuit depth

11. Compilation and Transpilation Overhead

• Original vs transpiled circuit depth and gate count
• Overhead from mapping to hardware topology

12. Resource Estimation for Fault-Tolerant Quantum Computing

• Logical-to-physical qubit overhead (e.g., surface code)
• Time-to-solution in error-corrected settings

13. Time-to-Solution (TTS)

• Real-world metric: includes queuing, gate speed, and measurement time
• Measured in milliseconds to seconds for NISQ hardware

14. Energy Usage and Cooling Costs (in Real Hardware)

• Superconducting qubits need cryogenic environments
• Physical infrastructure cost matters in scaling

15. Memory and Bandwidth Usage in Simulation

• Simulating large circuits on classical machines can be memory-intensive
• Resource bounds vary with backend type (e.g., tensor network vs statevector)

16. Metrics in Hybrid Quantum-Classical Workflows

• Classical optimization steps
• Quantum circuit evaluations per iteration
• Total wall-clock training time

17. Backend-Specific Cost Models (IBM, IonQ, Rigetti)

• IBM: based on gate and measurement error rates
• IonQ: trapped ion gate durations
• Rigetti: topology and fidelity models

18. Tools for Cost Analysis (Qiskit, t|ket>, Q#)

• Qiskit: qc.count_ops(), transpiler passes
• Q#: ResourcesEstimator
• t|ket>: optimization passes and backend-specific estimates

19. Benchmarking and Optimization Strategies

• Minimize CNOT gates (error-prone)
• Use basis gate-aware transpilation
• Balance fidelity and depth in ansatz design

20. Conclusion

Quantum cost metrics are essential for evaluating the feasibility and efficiency of quantum algorithms. With diverse hardware and circuit architectures, developers must consider cost profiles early in the design process to ensure optimal performance and resource usage.